Semiconductor memory device with increased coupling ratio

Details Semiconductor memory device with increased coupling ratio Semiconductor memory device with increased coupling ratio

1997-01-27

1999-03-23

Martin-Wallace, Valencia

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257317, 257320, 257321, 438264, 438594, H01L 2976

Patent

active

058863796

ABSTRACT:
A semiconductor memory device and a method for manufacturing a semiconductor memory device for increasing the coupling ratio are disclosed. In the memory device, a tunneling insulating film is formed on a semiconductor substrate. A floating gate is formed on the tunneling insulating film. A dielectric layer is formed on the surface of the floating gate. A control gate having a predetermined shape is formed on the dielectric layer. The capacitance between the control gate and the floating gate is increased, enlarging the coupling ratio. As a result, the power consumption can be reduced and the access time can be decreased.

REFERENCES:
patent: 4099196 (1978-07-01), Simko
patent: 4590504 (1986-05-01), Guterman
patent: 4618876 (1986-10-01), Stewart et al.
patent: 5640032 (1997-06-01), Tomioka

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