Semiconductor memory device with improved bit line arrangement

Static information storage and retrieval – Read/write circuit – Including signal comparison

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Details

365 51, 365149, 365208, 365210, G11C 700

Patent

active

048721425

ABSTRACT:
A dynamic type semiconductor memory device with an improved bit line arrangement is disclosed. The memory device comprises at least first and second pairs of bit lines and a sense amplifier having a pair of input terminals to which one pair of bit lines among the first and second bit line pairs are selectively connected, and is featured in that the bit lines of the first bit line pair and the bit lines of the second bit line pair are alternately arranged in parallel.

REFERENCES:
patent: 4367540 (1983-01-01), Shimohigashi
patent: 4581720 (1986-04-01), Takemae
patent: 4636985 (1987-01-01), Aoki et al.

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