Semiconductor memory device with improved address discriminating

Details Semiconductor memory device with improved address discriminating Semiconductor memory device with improved address discriminating

1990-06-26

1992-02-25

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Bad bit

365201, G11C 700

Patent

active

050918842

ABSTRACT:
For accelerating of a testing operation to determine which memory cell in a memory cell array is replaced with a redundant memory cell, a semiconductor memory device is composed of an address discriminating facility having an activation circuit operative to compare an address indicated by an address signal and the address assigned the memory cell replaced with the redundant memory cell for producing a first controlling signal. A testing operation controlling circuit is responsive to a test mode signal for producing a second controlling signal and a data write-in circuit responsive to the second controlling signal and producing a test bit of logic "1" level and a test bit of logic "0" level. The test bit of logic "1" and the test bit of logic "0" are respectively written into the redundant memory cell and the memory cell array so that an address assigned to the memory cell replaced with the redundant memory cell is discriminated through a read-out operation.

REFERENCES:
patent: 4573146 (1986-02-01), Graham et al.
patent: 4641310 (1987-02-01), Mortens et al.
patent: 5034923 (1991-07-01), Kuo et al.
Lucy, R. F. et al., "Memory Array Failure Pattern Recognition", IBM Technical Disclosure Bulletin, vol. 20, No. 10, Mar. 1978, pp. 3938-3939.

Affiliated with

Also associated with

Rating

Semiconductor memory device with improved address discriminating does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with improved address discriminating, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with improved address discriminating will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1897775