Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1998-09-04
2000-03-07
Mai, Son
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, G11C 700
Patent
active
060349034
ABSTRACT:
Disclosed is a semiconductor memory in which a repair device is easily positioned with respect to a redundancy fuse for a designation of replacement and a defect identification fuse. A semiconductor memory 1 includes sixteen blocks I/0300-I/0315 containing regular memory cells and redundancy memory cells, a fuse area 2 on one side, and sixteen I/O pads 3a-3p serving as connecting points, to the outside, of an internal circuit. The fuse area 2 includes a row redundancy fuse region 21, a column redundancy fuse region 22 and an operating fuse region 23. The operating fuse region 23 embraces operating fuses 231, 232 and an identification fuse 4 cut off when the internal circuit is defective, which are disposed adjacent to each other. An identification pad 5 for outputting a state of the identification fuse 4 to the outside is provided adjacent to the fuse area 2.
REFERENCES:
patent: 5309394 (1994-05-01), Wuertz et al.
patent: 5526317 (1996-06-01), McClure
patent: 5563821 (1996-10-01), Kumagai et al.
patent: 5579266 (1996-11-01), Tahara
patent: 5612918 (1997-03-01), McClure
Mai Son
OKI Electric Industry Co., Ltd.
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