Semiconductor memory device with ferroelectric capacitor cells w

Static information storage and retrieval – Systems using particular element – Ferroelectric

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365149, 365203, 36518909, G11C 1122

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050291289

ABSTRACT:
A semiconductor memory device includes bit line pairs including first and second bit lines to be selectively set at a first logic level or a second logic level, and a first memory cell coupled with the first bit line of the bit line pairs. The first memory cell contains a first ferroelectric capacitor with first and second electrode plates, and a first transistor coupled between the first electrode plate of the first ferroelectric capacitor and the first bit line. A potential at the second electrode plate of the first ferroelectric capacitor is set at a mid value between the first and second logic levels. A distance D (cm) between the first and second electrode plates of the first ferroelectric capacitor being selected such that a minimum voltage Et.times.D to saturate the intensity of polarization of the first ferroelectric capacitor is smaller than the value amounting to substantially half of the difference between the first and second logic levels, where Et indicates a field strength sufficient to saturate the intensity of the polarization of the first ferroelectric capacitor and is expressed in V/cm (volts/centimeter).

REFERENCES:
patent: 4799193 (1989-01-01), Horiguchi et al.
patent: 4853893 (1989-08-01), Eaton, Jr. et al.
patent: 4873664 (1989-10-01), Eaton, Jr.
patent: 4893272 (1990-01-01), Eaton, Jr. et al.
Iversen, "A New Memory Technology is About to Hit the Market," Electronics, pp. 91-95, Feb. 18, 1988.
Evans et al., "An Experimental 512-Bit Nonvolatile Memory with Ferroelectric Storage Cell," IEEE Journal of Solid-State Circuits, vol. 23, No. 5, pp. 1171-1175, Oct. 1988.

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