Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1995-10-23
1997-02-18
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Bad bit
36518905, 371 401, 371 201, G06F 1100
Patent
active
056047037
ABSTRACT:
A semiconductor memory device, in which in each unit circuit of a data output circuit, a resistor is connected to an input terminal of an inverter for performing a buffering amplification, and a transfer gate is turned on (closed) to short-circuit both ends of the resistor so as to pass corrected data output from an error correction circuit not via the resistor but directly to the inverter when a bit corresponding to an error check signal output from an error check circuit has an active level, resulting in a reduced time for outputting the corrected data.
REFERENCES:
patent: 5195099 (1993-03-01), Ueda et al.
patent: 5233610 (1993-08-01), Nakayama et al.
Le Vu A.
NEC Corporation
Nelms David C.
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