Semiconductor memory device with enhanced repair efficiency

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S225700, C365S189050

Reexamination Certificate

active

06865123

ABSTRACT:
There is provided a semiconductor memory device with an enhanced repair efficiency, in which a repair operation is performed without regard to the positions of defective unit cells when a detective cell is repaired using a redundant cell in a package state. The semiconductor memory device includes: a redundancy circuit including a plurality of redundant cells for replacing a defective normal cell, the redundant cells being activated in response to corresponding redundant cell select signals, wherein the redundancy circuit receives data in response to a repair signal and stores the data into the redundant cell selected by the redundant select signal; and a redundancy controller for activating the repair signal if the inputted addresses are repaired addresses, and for activating the redundant cell select signal for selecting one of the plurality of redundant cells according to lower-bit redundant cell select addresses corresponding to the number of the plurality of redundant cells.

REFERENCES:
patent: 4757474 (1988-07-01), Fukushi et al.
patent: 5272672 (1993-12-01), Ogihara
patent: 5386386 (1995-01-01), Ogihara

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