Semiconductor memory device with common I/O type circuit...

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

Reexamination Certificate

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Details

C365S230030, C365S189011, C365S202000, C365S189050, C365S191000

Reexamination Certificate

active

07064993

ABSTRACT:
A connection gate circuit includes first and second N channel MOS transistors connected in series between a first bit line of a pair of bit lines and a first global IO line of a pair of IO lines, and third and fourth N channel MOS transistors connected in series between a second bit line of the pair of bit lines and a second global IO line of the pair of IO lines. The first and second N channel MOS transistors have their gates receiving a sense amplifier activation signal activating a sense amplifier. The third and fourth N channel MOS transistors have their gates receiving a column selection signal.

REFERENCES:
patent: 6295240 (2001-09-01), Choi
patent: 6314045 (2001-11-01), Ikeda
patent: 6445632 (2002-09-01), Sakamoto
patent: 6608783 (2003-08-01), Frankowsky et al.
patent: 6847569 (2005-01-01), Sinha et al.
patent: 6-60657 (1994-03-01), None

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