Semiconductor memory device with an improved serial addressing s

Static information storage and retrieval – Read/write circuit – With shift register

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36523003, 365240, G11C 702

Patent

active

049439472

ABSTRACT:
A serially addressing type memory integrated circuit with an improved shift register operable at a high speed and fabricated on a reduced area of chip, is disclosed and featured in that the shift register has a plurality of first stages connected in cascade and arranged from a first location to a second location and a plurality of second stages connected in cascade and arranged from the second location to the first location and the first and second stages are alternately arranged one by one, and that an access detection circuit for indicating an access to an approximately center of serial addresses is connected to one of the first and second stages near the second location.

REFERENCES:
patent: 4395764 (1983-07-01), Matsue
patent: 4429375 (1984-01-01), Kobayashi et al.
patent: 4688197 (1987-08-01), Novak et al.
patent: 4796224 (1989-01-01), Kawai et al.
patent: 4802134 (1989-01-01), Tsujimoto

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