Semiconductor memory device with adjustable selected work...

Details Semiconductor memory device with adjustable selected work... Semiconductor memory device with adjustable selected work...

2006-07-25

2009-08-04

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

C365S154000, C365S230030

Reexamination Certificate

active

07570525

ABSTRACT:
A level shift element adjusting a voltage level at the time of selection of a word line according to fluctuations in threshold voltage of a memory cell transistor is arranged for each word line. This level shift element lowers a driver power supply voltage, and transmits the level-shifted voltage onto a selected word line. The level shift element can be replaced with a pull-down element for pulling down the word line voltage according to the threshold voltage level of the memory cell transistor. In either case, the selected word line voltage level can be adjusted according to the fluctuations in threshold voltage of the memory cell transistor without using another power supply system. Thus, the power supply circuitry is not complicated, and it is possible to achieve a semiconductor memory device that can stably read and write data even with a low power supply voltage.

REFERENCES:
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patent: 6088286 (2000-07-01), Yamauchi et al.
patent: 6426914 (2002-07-01), Dennard et al.
patent: 6934209 (2005-08-01), Marr
patent: 7085175 (2006-08-01), Remington et al.
patent: 2005-38557 (2005-02-01), None
K. Zhang et al., A 3-GHz 70Mb SRAM in 65nm CMOS Technology with Integrated Column-Based Dynamic Power Supply, ISSCC 2005, Digest of Technical Paper, Feb. 2005, pp. 474-475, 611.
M. Yamaoka et al, Low-Power Embedded SRAM Modules With Expanded Margins for Writing, ISSCC 2005, Digest of Technical Papers, Feb. 2005, pp. 480-481, 611.

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