Semiconductor memory device with a substrate bias voltage genera

Details Semiconductor memory device with a substrate bias voltage genera Semiconductor memory device with a substrate bias voltage genera

1995-02-15

1996-06-04

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

36523006, G11C 700

Patent

active

055240950

ABSTRACT:
In a CMOS type static RAM, a substrate bias voltage VPP higher than a power supply voltage supplied from an outer unit is supplied to an N type substrate region of a PMOS transistor of a CMOS inverter forming a word line driving circuit to bias the N type substrate region to the bias voltage VPP and to a power supply terminal of the CMOS inverter as a power supply voltage. Whereby, resistance of storage data to incidence of radioactive rays is increased just after writing to a storage node of a memory cell is ended, and a soft error generation rate can be easily reduced.

REFERENCES:
patent: 5376840 (1994-12-01), Nakayama
patent: 5394365 (1995-02-01), Tsukikawa

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