Semiconductor memory device with a refresh mechanism

Details Semiconductor memory device with a refresh mechanism Semiconductor memory device with a refresh mechanism

1983-12-27

1986-12-09

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Data refresh

365195, 365230, G11C 700

Patent

active

046284885

ABSTRACT:
A semiconductor memory device with a refresh mechanism having a plurality of memory cells integrated on a semiconductor substrate, a plurality of word lines and digit lines each connected to the memory cells, a refresh control circuit for successively selecting the word lines and refreshing the memory cells word line by word line in a refresh period and a time constant circuit connected to the word lines. The time constant circuit is activated whenever the word line connected to it is selected during an access period and emits a "refresh not required" signal until a predetermined time has elapsed. The refresh control circuit receives the "refresh not required" signal and then acts so as to skip the refreshing operation.

REFERENCES:
patent: 3811117 (1974-05-01), Anderson, Jr.

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