Semiconductor memory device with a redundancy circuit bypassing

Details Semiconductor memory device with a redundancy circuit bypassing Semiconductor memory device with a redundancy circuit bypassing

1991-06-03

1993-10-19

Mottola, Steven

Static information storage and retrieval

Read/write circuit

With shift register

365210, 3652257, G11C 700

Patent

active

052552268

ABSTRACT:
In a redundancy circuit, there is provided a data-transfer path switching circuit for switching on path-switching signals paths on which data is transferred from the data-storage places of the write shift register through the memory cell array to the data-storage place. Path switching signals are generated by blowing the fuse link corresponding to the number of data pieces input into the write shift register. The construction that the data to be read out first is transferred to the last data-storage place of the output circuit increases the speed of readout without shifting previously to readout when a shift register is used as output circuit. With a data register as output circuit, the output control circuit is fixed, thereby eliminating the need for trouble-some decoder switching.

REFERENCES:
patent: 4719601 (1988-01-01), Gray et al.

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