Semiconductor memory device with a page buffer having an...

Static information storage and retrieval – Read/write circuit – Particular read circuit

Reexamination Certificate

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Details

C365S189160, C365S189140, C365S189050, C365S051000, C365S063000, C365S185120, C365S185170

Reexamination Certificate

active

07408819

ABSTRACT:
A memory device is provided. The memory device includes a matrix of memory cells adapted to store data and arranged in a plurality of bit lines, the bit lines extending along a first direction; a page buffer adapted to interface the matrix with a downstream circuitry, the page buffer comprising a plurality of read/program units. Each read/program unit is associated with at least one bit line. The memory device further includes at least two groups each including at least two respective read/program units, wherein the read/program units of a generic one of said groups are generically aligned along the first direction. Each group comprises at least one signal track shared by the at least two read/program units of the group.

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patent: 103 44 021 (2004-07-01), None

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