Semiconductor memory device with a flexible redundancy scheme

Details Semiconductor memory device with a flexible redundancy scheme Semiconductor memory device with a flexible redundancy scheme

2005-10-18

2005-10-18

Phan, Trong (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185110, C365S185170

Reexamination Certificate

active

06956769

ABSTRACT:
A semiconductor memory device including an array with a first memory cell block having redundancy blocks and a second memory cell block having normal blocks. A redundancy block in the first memory cell block is substituted for a defective normal block in the second memory cell block. The substitution is performed by a block selection circuit. When substitution is required, the block selection circuit selects from among the first memory cell blocks in inverse order, beginning with the first memory cell block having the highest address. First memory cell blocks that are not substituted for defective cell blocks are used as normal memory cell blocks by the block selection circuit.

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patent: 1998-026248 (1998-07-01), None
English language abstract of Korean Publication No. 1998-026248.
English language abstract of Korean Publication No. 1996-0008851.

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