Semiconductor memory device which selectively controls a...

Details Semiconductor memory device which selectively controls a... Semiconductor memory device which selectively controls a...

2006-02-21

2006-02-21

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S207000, C365S210130

Reexamination Certificate

active

07002858

ABSTRACT:
A semiconductor memory device in which a local input/output line sense amplifier may be selectively enabled or disabled. The semiconductor memory device may include a memory cell array block, a redundancy circuit, a switch unit, and/or a control unit. The memory cell array block may include a local input/output line sense amplifier that operates in response to a sense amplifier enable signal. The redundancy circuit may include a redundancy local input/output line sense amplifier that operates in response to the sense amplifier enable signal. The switch unit may selectively output data output from the local input/output line sense amplifier or the redundancy local input/output line sense amplifier, in response to a first select signal and a second select signal. If the redundancy circuit operates, the control unit may generate, in response to the second select signal, a sense amplifier operation control signal that disables the local input/output line sense amplifier. Since the semiconductor memory device selectively enables or disables the local input/output line sense amplifier, unnecessary current consumption caused due to dummy sensing is avoided.

REFERENCES:
patent: 6745354 (2004-06-01), Terzioglu
patent: 6888778 (2005-05-01), Terzioglu et al.

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