Semiconductor memory device using dynamic type memory cells

Details Semiconductor memory device using dynamic type memory cells Semiconductor memory device using dynamic type memory cells

1995-12-12

1997-08-26

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Capacitors

365 63, 365 51, G11C 700

Patent

active

056616783

ABSTRACT:
A semiconductor memory device comprises a memory cell array including NAND type memory cell units arranged in matrix and having a plurality of dynamic type memory cells connected in series, a plurality of word lines, a plurality of bit lines arranged within the memory cell array, the plurality of bit lines including a bit line pairs which are arranged adjacent to each other or between which at least one bit line is interposed, and a plurality of sense amplifiers of a folded bit line type, provided in each of the plurality of bit line pairs, in which the memory cells are provided in positions corresponding to intersections of the bit lines and the word lines, and complementary data are written to two memory cells connected to each of the plurality of bit line pairs and one word line, and the two memory cells store one-bit data.

REFERENCES:
patent: 5058058 (1991-10-01), Yasuda et al.
patent: 5091887 (1992-02-01), Asakura
patent: 5309393 (1994-05-01), Sakata et al.
patent: 5418750 (1995-05-01), Shiratake et al.
Katsutaka Kimura, et al. ISSCC Digest of Technical Papers 34 (1991) pp. 106-108.
Takehiro Hasegawa, et al. ISSCC Digest of Technical Papers 36 (1993) pp. 46-47.

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