Semiconductor memory device using asynchronous signal

Details Semiconductor memory device using asynchronous signal Semiconductor memory device using asynchronous signal

1996-12-19

1998-12-01

Butler, Dennis M.

Static information storage and retrieval

Magnetic bubbles

Guide structure

395559, 365233, G06F 104

Patent

active

058451080

ABSTRACT:
A semiconductor memory device such as a DRAM has an internal oscillator to provide a periodic clock signal. During a read operation, output data is generated synchronized to the internal clock signal, and an external control signal is provided also synchronized to the internal clock signal. A requesting device utilizes the external control signal for fetching data from the memory device at high speed with improved setup and hold time. The control signal output is active only during a read operation, thereby reducing power consumption. Additionally, a common line is used for receiving address, instructions, and data. This drastically reduces the number of pins for interfacing to a memory device.

REFERENCES:
patent: 5262998 (1993-11-01), Mnich et al.
patent: 5596545 (1997-01-01), Lin
patent: 5640361 (1997-06-01), Hessel

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