Semiconductor memory device reducing noise

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

Reexamination Certificate

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C365S194000, C365S206000

Reexamination Certificate

active

06928014

ABSTRACT:
The present invention provides a semiconductor memory device capable of being stably operated by reducing power noise generated while a sense amplifier performing for sensing and amplifying data supplied to a bit line. For this object, an inventive semiconductor memory device includes a cell array having a plurality of cells; a plurality of bit lines supplied with voltage stored in the plurality of the cells; a plurality of sense amplifier block for sensing and amplifying a voltage of the plurality of the bit lines, each bit line being connected to each cell; a plurality of switches for selectively connecting or disconnecting the plurality of the sense amplifier block to the plurality of the bit lines; and a sense amplifier control block for turning on the plurality of the switches by using at least two different timing sets.

REFERENCES:
patent: 5644773 (1997-07-01), DiMarco
patent: 6088291 (2000-07-01), Fujioka et al.
patent: 6195302 (2001-02-01), Hardee
patent: 6246620 (2001-06-01), Fujioka et al.
patent: 6459964 (2002-10-01), Vu et al.
patent: 2001/0021140 (2001-09-01), Fujioka et al.
patent: 09-219091 (1997-08-01), None

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