Semiconductor memory device provided with an improved system for

Details Semiconductor memory device provided with an improved system for Semiconductor memory device provided with an improved system for

1990-08-08

1991-04-16

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

365 95, 36518901, G11C 1300

Patent

active

050088572

ABSTRACT:
A semiconductor memory device provided with an improved system for detecting an address of a defective column or row of memory cells replaced by a redundant column or row of memory cells through an output port comprises normal memory cells, at least one redundant memory cell, a power-on detection for generating a detection signal when a power supply to the memory circuit is switched on, a first circuit for initializing the normal memory cells at a first logic state in response to the detection signal, and a second circuit for initializing the redundant memory cell at a second logic state different from the first logic state in response to the detection signal.

REFERENCES:
patent: 4885720 (1989-12-01), Miller et al.

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