Semiconductor memory device performing self refresh operation

Details Semiconductor memory device performing self refresh operation Semiconductor memory device performing self refresh operation

2008-07-01

2008-07-01

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S189050, C365S233100

Reexamination Certificate

active

07394712

ABSTRACT:
The present invention relates to a semiconductor memory device to execute a refresh operation in such a manner that an entry and an exit of a self refresh mode is carried out. The present invention uses only external clock signals without a clock enable signal or an auto refresh command and therefore it is possible to implement a simple circuit for the self refresh. A semiconductor memory device includes a self refresh enable signal generator for outputting an activated self refresh enable signal when positive and negative external clock signals are in phase and a de-activated self refresh enable signal when the positive and negative external clock signals are out of phase and a self refresh block for performing a self refresh operation in response to the activated self refresh enable signal.

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patent: 2005-216429 (2005-08-01), None
patent: 2006-004558 (2006-01-01), None

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