Semiconductor memory device operable with reduced current consum

Details Semiconductor memory device operable with reduced current consum Semiconductor memory device operable with reduced current consum

1997-09-25

1999-04-13

Nelms, David

Static information storage and retrieval

Read/write circuit

Data refresh

365226, 365227, G11C 700

Patent

active

058944460

ABSTRACT:
An initializing circuit activates a self-refresh control signal generating circuit in response to power-on. The semiconductor memory device enters a self-refresh mode immediately after the power-on, and an RAS-related control circuit is in the initial state immediately after the power-on regardless of the logical state of external row address strobe signal /RAS, so that the current consumption can be nearly equal to a standby current.

REFERENCES:
patent: 4716551 (1987-12-01), Inagaki
patent: 4933902 (1990-06-01), Yamada et al.
patent: 5278792 (1994-01-01), Inoue et al.
patent: 5338282 (1994-08-01), Koike
patent: 5404335 (1995-04-01), Tobita
patent: 5477491 (1995-12-01), Shirai
patent: 5568440 (1996-10-01), Tsukude et al.
patent: 5594699 (1997-01-01), Nomura et al.
patent: 5633831 (1997-05-01), Tsukude et al.

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