Semiconductor memory device of redundant circuit system

Details Semiconductor memory device of redundant circuit system Semiconductor memory device of redundant circuit system

1999-08-10

2000-07-25

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, G11C 2900

Patent

active

060943866

ABSTRACT:
A semiconductor memory device includes a memory cell array including memory cells arranged in the form of a matrix; a redundant cell array including redundant cells arranged for relieving a defective memory cell of the memory cell array; a defective address memory circuit including first and second memory circuits using different programming methods for storing an address of the defective memory cell of the memory cell array; and a substitution control circuit for controlling the substitution of one of the redundant cells of the redundant cell array for the defective memory cell of the memory cell array on the basis of memory data of the defective address memory circuit. Thus, it is possible to provide a semiconductor memory device capable of reducing the area occupied by a defective address memory circuit and surely carrying out defect relief, and a method for producing the same.

REFERENCES:
patent: 5471426 (1995-11-01), McClure
patent: 5590085 (1996-12-01), Yuh et al.

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