Static information storage and retrieval – Systems using particular element – Ferroelectric
Reexamination Certificate
2001-02-14
2003-06-17
Nelms, David (Department: 2818)
Static information storage and retrieval
Systems using particular element
Ferroelectric
C365S065000, C365S185240
Reexamination Certificate
active
06580632
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor memory device with such a structure as changing a potential level in the channel region of a field effect transistor (FET) by utilizing the hysteresis properties of a ferroelectric film.
An FET, called “MFISFET”, “MFSFET” or “MFMISFET”, has been known as a semiconductor memory device including a non-volatile storage section with a ferroelectric thin film in its gate. An FET with such a structure will be herein called a “ferroelectric FET”.
FIG. 8
is a cross-sectional view of a known ferroelectric FET implemented as an MFISFET. As shown in
FIG. 8
, the FET includes silicon substrate
101
, silicon dioxide (SiO
2
) film
102
, ferroelectric film
103
, gate electrode
104
and source/drain regions
105
and
106
. The SiO
2
film
102
, ferroelectric film
103
and gate electrode
104
are stacked in this order on the substrate
101
. The ferroelectric film
103
is made of a metal oxide such as lead zirconate titanate (PZT) or bismuth strontium tantalate (SBT). The gate electrode
104
is made of a conductor like platinum (Pt). And the source/drain regions
105
and
106
are defined in the substrate
101
and located on right- and left-hand sides of the gate electrode
104
. In this device, part of the substrate
101
under the SiO
2
film
102
serves as a channel region
107
.
In the structure shown in
FIG. 8
, the ferroelectric film
103
exhibits electric spontaneous polarization of one of the following two types. More specifically, the electric dipole moment in the film
103
is either upward or downward depending on the polarity of a voltage applied between the gate electrode
104
and substrate
101
. As used herein, the “upward electric dipole moment” refers to the electric moment of electric dipoles showing positive polarity at their upper end, while the “downward electric dipole moment” refers to the electric moment of electric dipoles showing positive polarity at their lower end. The ferroelectric film
103
also shows dielectric hysteresis. That is to say, even after the voltage applied is removed, the polarization of either type remains in the film
103
. Thus, the film
103
exhibits one of these two different types of remnant polarization while zero voltage is applied to the gate electrode
104
. As a result, the channel region
107
of the ferroelectric FET enters one of two different states with mutually different potential depths corresponding to these two different types of remnant polarization. On the other hand, the source-drain resistance of the ferroelectric FET changes with the potential depth in the channel region
107
. Accordingly, it depends on the type of remnant polarization exhibited by the ferroelectric film
103
whether the source-drain resistance becomes relatively high or relatively low. And one of these two different states, corresponding to the high and low source-drain resistance values, respectively, is retained (or stored) so long as the ferroelectric film
103
keeps its remnant polarization. This is why a nonvolatile memory device is realized by a ferroelectric FET like this.
In a nonvolatile memory device using the known ferroelectric FET, one state assumed by the ferroelectric film
103
with the down remnant polarization is normally associated with data “1”. The other state assumed by the ferroelectric film
103
with the up remnant polarization is normally associated with data “0”. To create the down remnant polarization in the ferroelectric film
103
, a positive voltage may be applied to the gate electrode
104
with the backside of the substrate
101
grounded, and then the voltage applied to the electrode
104
may be reset to the ground level, for example. The up remnant polarization can be created in the ferroelectric film
103
in a similar manner. Specifically, first, a negative voltage may be applied to the gate electrode
104
with the backside of the substrate
101
grounded, and then the voltage applied to the electrode
104
may be reset to the ground level, for example.
FIGS. 9A
,
9
B and
9
C are energy band diagrams illustrating respective energy band states corresponding to down, up and almost zero remnant polarization exhibited by the ferroelectric film
103
. Each of these diagrams is illustrated for a cross section passing the gate electrode
104
, ferroelectric film
103
, SiO
2
film
102
and channel region
107
. In the example illustrated in
FIGS. 9A
,
9
B and
9
C, the substrate
101
is a p-type silicon substrate, the source/drain regions
105
and
106
are n-type semiconductor regions, and the arrows indicate the polarization directions of the ferroelectric film
103
.
To create the state shown in
FIG. 9A
, a voltage is applied to the gate electrode
104
so that the electrode
104
has a positive potential level with respect to the substrate
101
. That is to say, a positive voltage is applied to the electrode
104
. In this case, a potential difference produced between the electrode
104
and substrate
101
is allotted at a certain ratio to the ferroelectric and SiO
2
films
103
and
102
located between the electrode
104
and substrate
101
. Specifically, if the voltage applied to the electrode
104
is regulated in such a manner as to make the potential difference allotted to the ferroelectric film
103
greater than a polarization reversal voltage of the film
103
, then the film
103
exhibits down polarization. Thereafter, when the voltage applied to the electrode
104
is removed to reset the electrode
104
to the ground level, the film
103
produces down remnant polarization as shown in FIG.
9
A. While the remnant polarization is downward (i.e., in the data “1” state), an electric field, created between the lower and upper ends of the ferroelectric film
103
with positive and negative polarities, respectively, bends the energy bands of the ferroelectric film
103
, SiO
2
film
102
and channel region
107
as shown in FIG.
9
A. In such a situation, part of the channel region
107
near the interface between the region
107
and SiO
2
film
102
changes its conductivity type from p- into n-type. That is to say, negative ions are densely concentrated at that part of the channel region
107
. As a result, a depletion layer expands to the deeper part of the substrate
101
, and the potential level at that part near the Si—SiO
2
interface becomes lower than the ground level. In other words, a so-called “inversion layer” is formed in that part of the channel region
107
.
On the other hand, to create the state shown in
FIG. 9B
, another voltage is applied to the gate electrode
104
so that the electrode
104
has a negative potential level with respect to the substrate
101
. That is to say, a negative voltage is applied to the electrode
104
. In this case, the voltage applied to the electrode
104
is regulated in such a manner as to make the potential difference allotted to the ferroelectric film
103
greater than the polarization reversal voltage of the film
103
. Thereafter, when the voltage applied to the electrode
104
is removed to reset the electrode
104
to the ground level, the film
103
produces up remnant polarization as shown in FIG.
9
B. While the remnant polarization is upward (i.e., in the data “0” state), an electric field, created between the lower and upper ends of the ferroelectric film
103
with negative and positive polarities, respectively, bends the energy bands of the ferroelectric film
103
, SiO
2
film
102
and channel region
107
as shown in FIG.
9
B. In such a situation, however, holes, or majority carriers, are densely concentrated in that part of the channel region
107
near the Si—SiO
2
interface. Accordingly, no depletion layer is formed in the channel region and the potential level at the channel region
107
is substantially equal to the ground level.
As can be seen, the potential level at that part of the channel region
107
near the Si—SiO
2
interface changes depending on the direction of the remnant polarization. Accordingly, if a potential differe
Arita Koji
Shimada Yasuhiro
Uchiyama Kiyoshi
Nelms David
Nixon & Peabody LLP
Studebaker Donald R.
Yoha Connie C.
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