Semiconductor memory device, memory device support and...

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S051000

Reexamination Certificate

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07969761

ABSTRACT:
In one embodiment, the semiconductor memory device includes at least a first semiconductor memory die, and a surface of the semiconductor memory device includes a plurality of connectors. At least one of the plurality of connectors is electrically connected to the first semiconductor memory die. The plurality of connectors include at least first and second control signal connectors. The first control signal connector is for a first control signal of a first type, the second control signal connector is for a second control signal of the first type, and the first and second control signal connectors are disposed in different areas of the surface. For example, the first type may be a chip select signal, a clock enable signal, or an on die termination enable signal.

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Chinese Office Action issued Mar. 14, 2011 for Chinese Patent Application No. 200810005626.6.

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