Semiconductor memory device including thin-film load transistors

Details Semiconductor memory device including thin-film load transistors Semiconductor memory device including thin-film load transistors

1994-11-01

1996-06-11

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

257369, 257351, 257903, H01L 2978

Patent

active

055263046

ABSTRACT:
A semiconductor device which comprises plural memory cells, said memory cell comprising: a flip-flop circuit including a pair of drive transistors each having a gate, a gate oxide film and source/drain regions, and a pair of load TFTs connected to said pair of drive transistors, each of said load TFTs having a gate electrode, a gate oxide film and an active layer including source/drain regions all of which are deposited sequentially in that order; and a pair of access transistors connected to said flip-flop circuit; wherein either one of the source/drain regions of said each TFT is connected to at least either one drive transistor at either one of the source/drain regions thereof or the other drive transistor at the gate thereof via a semiconductor pad, and the other of the source/drain regions of the TFT is connected to a wiring layer via a semiconductor pad; and at least surface layer of said semiconductor pad has the same conductivity type as that of the source/drain regions of the TFT.

REFERENCES:
patent: 4814841 (1989-03-01), Masuoka et al.
patent: 5173754 (1992-12-01), Manning
patent: 5331170 (1994-07-01), Hayashi
patent: 5382807 (1995-01-01), Tsutsumi et al.
IDEM 1990 Technical Digest, "A Polysilicon Transistor Technology for Large Capacity SRAMs", S. Ikeda et al, pp. 469-472.

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