Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1995-06-06
1996-08-06
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
36518901, 365226, G11C 700
Patent
active
055441025
ABSTRACT:
In a semiconductor memory device including a boosting circuit for generating a high voltage constantly, and a word line driving circuit for transmitting a high voltage from the boosting circuit on a selected word line, a capacitor for stabilizing the high voltage generated by the boosting circuit is formed of a series of capacitive elements using a FET having a gate insulating film identical in thickness to that of a insulating gate type field effect transistor in the memory device. A voltage applied across each capacitive element is relaxed, and the capacitor is improved in dielectric breakdown voltage characteristics, to stably supply the high voltage.
REFERENCES:
patent: 4788664 (1988-11-01), Tobita
patent: 4980799 (1990-12-01), Tobita
Martino Jr., et al., "An On-Chip Back-Bias Generator for MOS Dynamic Memory", IEEE Journal of Solid-State Circuits, vol. SC-15, No. 5, Oct. 1980, pp. 820-826.
Tobita Yoichi
Tokami Kenji
Mitsubishi Denki & Kabushiki Kaisha
Nelms David C.
Niranjan F.
LandOfFree
Semiconductor memory device including stabilizing capacitive ele does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device including stabilizing capacitive ele, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device including stabilizing capacitive ele will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2196927