Semiconductor memory device including SRAM cell having well...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S530000, C257S510000, C257S408000, C257S392000, C257S365000, C257S903000

Reexamination Certificate

active

07825471

ABSTRACT:
A semiconductor memory device includes a first well region of a first conductivity type, first and second SRAM cells adjacently arranged to each other, the first and second SRAM cells each including at least a first transfer transistor and a drive transistor formed on the first well, the first transfer transistor and the drive transistor being coupled in series between a bit line and a power source line, and a first diffusion region of the first conductivity type arranged between the drive transistor of the first SRAM cell and the drive transistor of the second SRAM cell, to apply a first well potential to the first well.

REFERENCES:
patent: 6856031 (2005-02-01), Nguyen et al.
patent: 6885609 (2005-04-01), Lee et al.
patent: 7239538 (2007-07-01), Asayama et al.
patent: 2004/0120209 (2004-06-01), Lee et al.
patent: 2006/0171192 (2006-08-01), Asayama et al.
patent: 2007/0090485 (2007-04-01), Takao
patent: 2004-200702 (2004-07-01), None
patent: 2005-236282 (2005-09-01), None
patent: 2006-210736 (2006-08-01), None

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