Semiconductor memory device including repair redundancy...

Details Semiconductor memory device including repair redundancy... Semiconductor memory device including repair redundancy...

2011-08-16

2011-08-16

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000, C365S230030, C365S230040, C365S231000, C365S233130

Reexamination Certificate

active

08000158

ABSTRACT:
A semiconductor memory device includes a plurality of memory cell matrixes each of which contains plural memory cell arrays whose number is lager than 2nand smaller than 2n+1, n being a natural number. The semiconductor memory device includes normal memory cell arrays including 2mnumbers of memory cell arrays of the plurality of memory cell matrixes, m being a bit of addresses, wherein a data access operation is performed on normal memory cells in the normal memory cell arrays as normal word lines corresponding to the normal memory cells are activated in response to the addresses, and additional redundancy memory cell arrays in the plurality of memory cell matrixes, wherein repair-expected memory cells in the normal memory cell arrays are replaced with the additional redundancy memory cell arrays as redundancy word lines corresponding to the additional redundancy memory cells are activated in response to the addresses corresponding to the repair-expected memory cells.

REFERENCES:
patent: 2009/0040825 (2009-02-01), Adusumilli et al.

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