Semiconductor memory device including redundancy circuit for rem

Details Semiconductor memory device including redundancy circuit for rem Semiconductor memory device including redundancy circuit for rem

1994-09-13

1995-11-21

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

36518901, G11C 1300

Patent

active

054693918

ABSTRACT:
One transmission gate and one fuse are provided in series corresponding to a predecode signal. A fuse for turning on or off the transmission gate and a fuse for grounding an output are provided. When a redundancy memory cell row is not used, all the fuses are connected. The transmission gate is turned off, and the output is grounded. When the redundancy memory cell row is used, all the fuses excluding one fuse corresponding to the predecode signal to be transmitted are disconnected.

REFERENCES:
patent: 4908798 (1990-03-01), Urai

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