Semiconductor memory device including redundancy circuit

Static information storage and retrieval – Read/write circuit – Bad bit

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36523003, 365207, 371 102, 371 103, G11C 700, G11C 800, G06F 1100

Patent

active

053922476

ABSTRACT:
An addressing system of redundancy word lines is provided independently of an addressing system of word lines in memory cell array blocks. Outputs of substitution circuits including redundancy selecting circuits and substitute address program circuits are applied as redundancy word line activating signals directly to the redundancy word lines not through decoders, respectively. An output of a normal memory cell nonselecting circuit is applied as a decoder inactivating signal to the decoders.

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