Semiconductor memory device including programmable mode selectio

Details Semiconductor memory device including programmable mode selectio Semiconductor memory device including programmable mode selectio

1987-04-02

1989-05-23

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Having fuse element

36523001, 36523006, 3072021, G11C 700

Patent

active

048336505

ABSTRACT:
A semiconductor memory device includes a plurality of operation mode control circuits provided on a memory chip of the device for respectively executing a corresponding plurality of writing/reading operation modes including at least a static column mode, a high speed page mode and a nibble mode, and a plurality of operation mode selection circuits provided on the memory chip, each of the operation mode selection circuits having a fuse element and a bonding pad for selecting one of the plurality of the operation mode control circuits when the fuse element is cut off or the bonding pad is selectively wired, so that various functions can be selectively effected on the same chip.

REFERENCES:
patent: 4562555 (1985-12-01), Ouchi et al.
patent: 4586167 (1986-04-01), Fujishima et al.
patent: 4590388 (1986-05-01), Clemons et al.
patent: 4685084 (1987-08-01), Canepa
patent: 4789966 (1988-12-01), Ozaki
Nishikawa, "MSM411000/411001/414256(1M Bit Draw)", The Electronic Material, Jan. 1986, pp. 66-71.

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