Semiconductor memory device including program inhibition capacit

Static information storage and retrieval – Floating gate – Disturbance control

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Details

36518517, 36518518, 36518526, 36518527, 36518528, G11C 1606

Patent

active

056711760

ABSTRACT:
An integrated circuit memory device includes a plurality of wordlines, a plurality of program inhibition lines, a plurality of serially connected memory cell transistors, and a plurality of program inhibition capacitors. Each of the memory cell transistors includes a gate connected to a respective one of the wordlines. Each of the program inhibition capacitors has a first terminal connected to a source/drain of a respective one of the memory cell transistors, and a second terminal connected to a respective one of the program inhibition lines. Related methods are also disclosed.

REFERENCES:
patent: 5581504 (1996-12-01), Chang
patent: 5596523 (1997-01-01), Endoh et al.

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