Semiconductor memory device including global IO line with...

Details Semiconductor memory device including global IO line with... Semiconductor memory device including global IO line with...

2006-12-19

2006-12-19

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

C365S227000, C365S185230

Reexamination Certificate

active

07151703

ABSTRACT:
A semiconductor memory device including a global IO line with a low-amplitude driving voltage signal applied thereto. In the device, a first driver converts a data signal of a first voltage level from a memory cell to a second voltage level in response to a read control signal, and outputs it to a global IO line. A first level shifter converts the data signal of the second voltage level from the line back to the first voltage level, and outputs it to a data output terminal. A second driver converts an external data signal of a first voltage level from a data input terminal to a second voltage level, and outputs it to a global IO line. A second level shifter converts the external data signal of the second voltage level from the line back to the first voltage level and outputs it to a write driver.

REFERENCES:
patent: 5267197 (1993-11-01), McClure
patent: 5930196 (1999-07-01), Yim
patent: 5953261 (1999-09-01), Furutani et al.
patent: 6424015 (2002-07-01), Ishibashi et al.
patent: 6462998 (2002-10-01), Proebsting
patent: 6519195 (2003-02-01), Kanno et al.

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