Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate
2007-06-05
2007-06-05
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
C365S191000, C365S154000
Reexamination Certificate
active
11181144
ABSTRACT:
We describe a semiconductor memory device including a memory cell array and a storage device to store access data. The memory cell array is accessed responsive to the access data. The memory cell array access is determined by the access data stored in the storage device. The memory cell array is accessed according to access data only if necessary, drastically reducing power dissipation.
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English language abstract of the Japanese Publication No. 2004-047003.
English language abstract of the Japanese Publication No. 2004-095027.
Graham Kretelia
Marger & Johnson & McCollom, P.C.
Zarabian Amir
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