Semiconductor memory device including a capacitor an upper...

Details Semiconductor memory device including a capacitor an upper... Semiconductor memory device including a capacitor an upper...

2005-02-15

2005-02-15

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C257S298000, C257S310000

Reexamination Certificate

active

06855973

ABSTRACT:
On a silicon substrate201, there are formed a silicon oxide202, an adhesion layer203consisting of TiO2, a lower electrode204consisting of Pt, a ferroelectric thin film205, and an upper electrode206consisting of Pt. A portion of the ferroelectric thin film adjacent to the upper electrode206is formed from a compound with a composition formula of SrBi2(TaxNb1-x)2O9where x=0.7. A compound with a value x in the composition formula being greater than 0.7 is used for the portion of the ferroelectric thin film adjacent to the upper electrode206, so as to generate an appropriate number of grain boundaries on the surface of the ferroelectric film205, the grain boundaries enabling implementation of anchoring effect between the ferroelectric film205and the upper electrode206, thereby achieving prevention of exfoliation of the upper electrode206from the ferroelectric film205. Therefore, the semiconductor memory device is free from exfoliation of the upper electrode film from the dielectric film and has a good yield.

REFERENCES:
patent: 5434102 (1995-07-01), Watanabe et al.
patent: 6236076 (2001-05-01), Arita et al.
patent: 20010011743 (2001-08-01), Arita et al.
patent: 08-023073 (1996-01-01), None

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