Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1990-08-10
1991-01-08
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Data refresh
365233, G11C 1140, G11C 1300
Patent
active
049842102
ABSTRACT:
In a dynamic random access memory (DRAM), there is provided a refresh decision circuit which detects the external designation of a self refresh mode, in addition to a CAS before RAS refresh mode, by RAS and CAS signals. By detecting a time period of one cycle of the RAS, the self refresh mode is determined. As a result, the timing of change of the RAS signal is less restricted.
REFERENCES:
patent: 3737879 (1973-06-01), Greene et al.
Dosaka Katsumi
Komatsu Takahiro
Konishi Yasuhiro
Kumanoya Masaki
Tobita Youichi
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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