Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent
1995-06-06
1997-11-18
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
365203, 36518909, 365228, 36518907, 36523003, 365190, 365207, G11C 700
Patent
active
056894619
ABSTRACT:
An equalizing circuit is connected between a pair of bit lines. The equalizing circuit is made up of three MOS transistors and an equalization control signal is supplied to the gates of the MOS transistors. A sense amplifier circuit is connected to the bit lines. The sense amplifier circuit amplifies the potential difference occurring between the bit lines, for the detection of data. The equalization control signal is output from a level conversion circuit. An internal boosted voltage-generating circuit constantly generates a boosted voltage which is higher than an externally-applied power supply voltage applied to a power supply terminal. The boosted voltage is applied to the level conversion circuit. The level conversion circuit converts an input control signal, whose high-level voltage is equal to, or lower than the externally-applied power supply voltage, into the boosted voltage, thereby generating the equalization control signal.
REFERENCES:
patent: 5361237 (1994-11-01), Chishiki
Kaneko Tetsuya
Ohsawa Takashi
Kabushiki Kaisha Toshiba
Nelms David C.
Tran Andrew Q.
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