Semiconductor memory device having two-transistor,...

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S189011, C365S196000

Reexamination Certificate

active

06859384

ABSTRACT:
An active region which forms two transistors included in a memory cell is arranged to have a strip shape along a predetermined axis crossing first and second bit lines at less than 90 degrees, whereby it is possible to reduce a junction area corresponding to a connection node of connecting the two transistors between the active region and a substrate and to reduce a leak current.

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“Transparent-Refresh DRAM (TReD) Using Dual-Port DRAM Cell”, Sakurai et al., IEEE 1988,Custom Integrated Circuits Conference, pp. 4.3.1-4.3.4.

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