Semiconductor memory device having two or more memory blocks

Details Semiconductor memory device having two or more memory blocks Semiconductor memory device having two or more memory blocks

1998-05-28

1999-10-19

Dinh, Son T.

Static information storage and retrieval

Addressing

Plural blocks or banks

365194, G11C 1100

Patent

active

059700149

ABSTRACT:
A semiconductor memory device having two or more memory blocks is disclosed. The disclosed semiconductor memory device comprises first and second memory cores, first and second output circuits and internal output lines connected to the first and second output circuits, respectively. The first and second output circuits are respectively connected to said first and second memory cores for outputting the data in response to first and second control signals, respectively. The disclosed semiconductor memory device further comprises first and second control signal generating circuits. The first and second control signal generating circuits are connected to the first and second output circuits for generating the first and second control signals to the first and second output circuits. The first and second control signal generating circuits receive first and second read signals having the active state and the inactive state that is switched in response to a read control signal. The first and second control signal generating circuits switch the first and second control signals to the active state with a predetermined time delay when the first and second read signals are switched from the inactive state to the active state, while these immediately switch the first and second control signals to the inactive state when the first and second read signal are switched from the active state to the inactive state.

REFERENCES:
patent: 5388072 (1995-02-01), Matick et al.
patent: 5398209 (1995-03-01), Iwakiri et al.
patent: 5642319 (1997-06-01), Nagashima
patent: 5777938 (1998-07-01), Nakamura et al.

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