Semiconductor memory device having switch to selectively connect

Static information storage and retrieval – Addressing – Multiple port access

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365154, 365156, 365190, G11C 800

Patent

active

059532815

ABSTRACT:
A semiconductor memory device includes a pair of read address terminals which supplies first and second read addresses for outputting stored at a selected memory cell to one of a pair of bit lines, and a selector which selects one of the bit lines corresponding to whether a present reading is for the first read address or for the second read address, and which outputs a data read in the selected bit line to an output terminal. Accordingly, the semiconductor memory device can set a frequency of a signal applied to a precharge signal input terminal to a value which is lower than a conventional semiconductor memory device, and can improve the speed at which the data is read.

REFERENCES:
patent: 5424995 (1995-06-01), Miyazaki et al.
patent: 5774393 (1998-06-01), Kuriyama
patent: 5774410 (1998-06-01), Nakase
patent: 5812469 (1998-09-01), Nadeau-Dostie et al.

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