Static information storage and retrieval – Format or disposition of elements
Reexamination Certificate
2001-09-28
2002-04-30
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Format or disposition of elements
C365S149000, C365S063000, C257S296000, C257S306000, C257S311000, C257S303000, C257S304000
Reexamination Certificate
active
06381165
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a semiconductor memory device and a mask pattern for defining the same, and more particularly, to a storage node electrode array of a semiconductor memory device and a mask pattern for defining the same.
2. Description of Related Art
As the integration density of semiconductor devices increases, the area occupied by a unit active cell decreases. Since the driving capability of a memory device, such as a DRAM, is determined by the capacitance of a capacitor, various efforts have been made to increase the capacitance of a capacitor irrespective of the decrease in the area required for the capacitor. Up to now, a concave type storage electrode has been most widely used in order to the increase the effective size of the capacitor.
FIG. 1
is a plan view of a conventional concave type storage electrode. Referring to
FIG. 1
, a plurality of concave type storage node electrodes
12
are arranged on a semiconductor substrate
10
that includes a MOS transistor (not shown) and other electric plugs (not shown). In other words, the concave type storage node electrodes
12
are horizontally and vertically arranged a predetermined distance apart in a sort of matrix. Thus, the storage node electrodes
12
belonging to the same row are arranged in a straight line. Also, the storage node electrodes
12
belonging to the same column are arranged in a straight line. Each of the concave type storage electrodes
12
may be oval-shaped.
However, as the integration density of memory devices increases, the density of the storage node electrodes
12
of a semiconductor memory device increases. Accordingly, it is difficult to maintain sufficient gaps S
1
and S
2
between adjacent storage node electrodes
12
. If the gaps S
1
and S
2
between adjacent storage node electrodes
12
are not sufficiently maintained, as illustrated in
FIG. 1
, a bridge
14
may be generated between the storage node electrodes
12
causing occurrences of electrical defects, such as a twin-bit fail or a multi-bit fail.
There are many reasons why a bridge
14
may form. However, hereinafter, only the physical and dynamic reasons for the generation of the bridge
14
will be described. Referring to
FIG. 1
, concave type storage node electrodes
12
are formed on the semiconductor substrate, and the resultant substrate is cleaned. In the cleaning process, a water screen (not shown) may be formed between the storage node electrodes
12
due to a rinse. Then, oxygen O
2
in the air easily dissolves in the water screen. The oxygen dissolved in the water screen forms a silicon oxide (SiO
2
) layer on the surface of the storage node electrodes
12
. The silicon oxide layer is dissolved into a type of silicate in the water screen between the storage node electrodes
12
. After that, a drying process is performed. Then, the volume of the water screen between the storage node electrodes
12
decreases, and thus surface tension between the storage node electrodes
12
increases. As a result, solid type silicate
14
only remains in the water screen between the storage node electrodes
12
, and the remaining silicate
14
becomes a bridge.
The reason for the occurrence of the bridge
14
will be described more fully with reference to Equation (1). In general, as shown in
FIGS. 2
a
and
2
b
, the forces in action between the two adjacent storage node electrodes are surface tension (Fs), which is an attractive force, and a shear-and-bending force (Fe), which is a repulsive force. Assuming that the storage node electrode
12
has a hexagonal structure and is a rigid beam installed on a hard substrate, the shear-and-bending force Fe can be expressed by Equation (1).
Fe
=
3
EIx
H
3
(
1
)
In Equation (1), E is Young's coefficient, that is, an elasticity coefficient of a material forming a storage node electrode, I is the inertial momentum of the horizontal cross-section of the storage node electrode
12
, that is, the momentum for the storage node electrode
12
to continuously rotate in a spin dry process and is described as the elasticity of the storage node electrode
12
with respect to the thickness of the cylindrical storage node electrode
12
, H is the height of the storage node electrode
12
, and x is the distance by which the storage node electrode
12
is deformed. The deformation distance x is the distance between the original position of the upper part of the storage node electrode and the position of the upper part of the deformed storage node electrode.
The surface tension Fs between the storage node electrodes
12
is expressed by Equation (2).
Fs
=2&ggr; sin &thgr;(
L+H
) (2)
In Equation (2), y indicates the surface tension coefficient of water, and &thgr; indicates a contact angle which the storage node electrode
12
forms with water. L indicates the length of the storage node electrode
12
, specifically, the opposing surface length of each of the two adjacent storage node electrodes.
In a state of equilibrium, the surface tension Fs and the shear-and-bending force Fe have the same strength. Thus, the deformation distance x of the storage node electrode
12
can be defined by Equation (3) obtained by combining Equation (1) and Equation (2).
x
=
2
γ
sin
θ
(
L
+
H
)
H
3
3
EI
(
3
)
According to Equation (3), the deformation distance x is proportional to the correspondence length L and the height H of the storage node electrode
12
but is inversely proportional to the elasticity coefficient E and the inertia momentum I of the storage node electrode
12
.
Generally, the probability P of a bridge occurring between the storage node electrodes
12
is proportional to the deformation distance of each of the storage node electrodes
12
but is inversely proportional to the distance D between the storage node electrodes
12
. Accordingly, these relations can be expressed by Equation (4) obtained by substituting the deformation distance x for the probability of bridge occurrence P in Equation (3).
P
∝
2
γ
sin
θ
(
L
+
H
)
H
3
3
EID
(
4
)
As shown in Equation (4), as the distance D between the storage node electrodes
12
decreases, the height H of each of the storage node electrodes
12
increases, the opposing surface length L of each of the two horizontally-adjacent storage node electrodes
12
increases, and the bridge occurrence probability P increases.
However, to enhance the storage capacity of currently-used memory devices, a plurality of storage node electrodes must be integrated into a limited space and, simultaneously, the surface area of each of the storage node electrodes must be increased by increasing the height of each of the storage node electrodes. Thus, there is a limit to decreasing the distance between the storage node electrodes and the height and length of the storage node electrodes. Therefore, the probability of a bridge occurring becomes very high.
In addition, as shown in
FIG. 3
, to increase the surface area of each of the storage node electrodes
12
more, excessive light exposure must be performed to define the storage node electrodes
12
. However, in this case, the storage node electrodes are defined to be larger than the desired storage node electrodes because of the excess exposure. Since the distance between the storage node electrodes
12
is very small, the adjacent storage node electrodes may contact together due to the excess exposure. Thus, it is difficult to perform an additional process to increase the surface area of the storage node electrodes
12
. Reference numeral
15
of
FIG. 3
, which is not yet mentioned, indicates the increased area of an additionally expanded storage node electrode caused by excess exposure.
SUMMARY OF THE INVENTION
To solve the above and other related problems of the prior art, there is provided a semiconductor memory device having improved electrical characteristics. The semico
Cho Han-ku
Lee Jung-hyeon
F. Chau & Associates LLP
Samsung Electronics Co,. Ltd.
Tran Andrew Q.
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