Semiconductor memory device having stabilization circuit for sta

Details Semiconductor memory device having stabilization circuit for sta Semiconductor memory device having stabilization circuit for sta

1999-12-23

2000-11-28

Nelms, David

Static information storage and retrieval

Read/write circuit

Signals

36518911, 365203, 326 86, G11C 700

Patent

active

061543977

ABSTRACT:
A semiconductor memory device includes a transmission line, connected to a driving unit, for transmitting a signal from the driving unit, a delaying unit for delaying a level of the transmission line to output the delayed signal, a precharging unit for receiving the delayed signal to precharge the transmission line, and a stabilization unit for accelerating the level transition of the transmission line, wherein the stabilization unit includes a detecting unit for detecting the level of the transmission line transmitted from the driving unit to generate a detected signal, and a switching unit for performing a switching operation in response to the detected level to swiftly achieve a level transition of the transmission line.

REFERENCES:
patent: 5311471 (1994-05-01), Matsumoto et al.
patent: 5416743 (1995-05-01), Allan et al.
patent: 5625592 (1997-04-01), Shinozaki
patent: 5654927 (1997-08-01), Lee
patent: 5715210 (1998-02-01), Yoo et al.
patent: 5742185 (1998-04-01), Lee

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