Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2007-11-06
2010-06-01
Luu, Pho M (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S230030, C365S207000, C365S208000, C365S051000
Reexamination Certificate
active
07729195
ABSTRACT:
Semiconductor memory devices having hierarchical word line structures are provided. A block of sub-word line driver circuits (SWDB) are disposed between a first block of memory and a second block of memory. A SWDB includes a plurality of sub-wordline driver (SWD) circuits arranged in a plurality of SWD columns each having four SWD circuits extending in a first direction between the first and second blocks of memory. Two adjacent SWD columns include a SWD group for driving a plurality of sub-word lines extending from the SWD group along the first direction into the first and second blocks of memory.
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Rhee Sang-Jae
Yoon Yoon-Hwan
Youn Jae-Youn
Bui Tha-O
F. Chau & Associates LLC
Luu Pho M
Samsung Electronics Co,. Ltd.
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