Semiconductor memory device having specific layout configuration

Details Semiconductor memory device having specific layout configuration Semiconductor memory device having specific layout configuration

1993-03-18

1994-05-24

Ngo, Ngan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257401, 257903, 257904, H01L 2710, H01L 2715, H01L 2702

Patent

active

053151461

ABSTRACT:
A semiconductor memory device includes a gate region of each driver transistor arranged obliquely with respect to a first direction of a chip; a source/drain region of each driver transistor arranged obliquely with respect to the first direction; contact windows arranged substantially straight with respect to the first direction and connecting each source/drain region of the driver transistors to a power supply line provided in the first direction; and contact windows arranged every one contact window in a zigzag manner with respect to the first direction and connecting each source/drain region of transfer gate transistors to a corresponding bit line. By the constitution, it is possible to reduce an area of memory cell regions resulting in a reduction in a chip area, and to cause respective driver transistors to have uniform characteristics and thus improve an operation reliability thereof.

REFERENCES:
patent: 4322824 (1982-03-01), Allan

Affiliated with

Also associated with

Rating

Semiconductor memory device having specific layout configuration does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having specific layout configuration, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having specific layout configuration will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1974773