Semiconductor memory device having SOI structure and manufacturi

Details Semiconductor memory device having SOI structure and manufacturi Semiconductor memory device having SOI structure and manufacturi

1994-09-07

1996-02-27

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Capacitors

257296, 257310, 257311, 257350, G11C 1124, H01L 2702, H01L 2978

Patent

active

054954398

ABSTRACT:
A dielectric layer is formed on a main surface of a semiconductor substrate. A silicon layer is formed on dielectric layer. MOS transistors are formed in the silicon layer and include impurity regions in a semiconductor layer. A capacitor is formed by cooperation of the impurity region, the dielectric layer, and the semiconductor substrate. The dielectric layer also serves as an insulating film of an SOI structure. Thus, a semiconductor memory device which achieves high performance and allows high integration can easily be obtained in a DRAM having an SOI structure.

REFERENCES:
patent: 4432006 (1984-02-01), Takei
patent: 4839707 (1989-06-01), Shields
patent: 5237187 (1993-08-01), Suwanai
patent: 5406102 (1995-04-01), Oashi
"A Buried Capacitor DRAM Cell With Bonded SOI For 256M and 1GBIT DRAMs", Toshiyuki Nishihara et al., IEDM 92, 1992, pp. 803-806.
"Novel SOI CMOS Design Using Ultra Thin Near Intrinsic Substrate", S. D. S. Malhi et al., IEEE 1982, pp. 107-111.
A Dynamic RAM cell in Recrystallized Polysilicon, IEEE Electron Device Letters, vol. EDL-4, No. 1 (Jan. 1983).

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