Semiconductor memory device having short read time

Details Semiconductor memory device having short read time Semiconductor memory device having short read time

1997-03-27

1999-07-27

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365194, G11C 700

Patent

active

059301899

ABSTRACT:
A semiconductor memory device disclosed which has an optimized read time in the reading operation. It is realized that both the wiring delay of a control signal bus 903 and a wiring delay of a data signal bus 412 are set equivalently. For example, an amplifier circuit 419 is received a read-out data through the data signal bus 412 and amplifies the read-out data in response to a enable signal 510. In this case, the enable signal 510 is generated by an amplifier control circuit 904 in response to a delay control signal which is through the control bus 903. Since the enable signal 510 which activates the amplifier circuit 419 is generated at a most preferred timing, thereby the data reading-out speed can be increased up to its limit speed.

REFERENCES:
patent: 5291450 (1994-03-01), Fujiwara
patent: 5293338 (1994-03-01), Ihara

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