Semiconductor memory device having sense amplifiers with offset

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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365 63, 327 57, G11C 706

Patent

active

058869387

ABSTRACT:
A semiconductor memory device 10 having sense amplifiers where the latch transistor moat region width is increased for the same sense transistor pitch. Each sense amplifier comprises latch transistors having a moat region and a gate region comprising a plurality of gate fingers where the length of the gate fingers is determined by the pitch of the sense amplifier. Adjacent latch transistors are offset from one another in both the horizontal and vertical directions and the gate fingers of those latch transistors are interleaved such that the latch transistors have wider moat regions while maintaining the sense amplifier latch transistor pitch. The resulting structure increases the sensing performance while maintaining the pitch.

REFERENCES:
patent: 5317178 (1994-05-01), Wu
patent: 5644525 (1997-07-01), Takashima et al.

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