Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1996-02-27
1997-05-27
Nguyen, Tan T.
Static information storage and retrieval
Read/write circuit
Data refresh
365226, 36518909, 36518907, G11C 700
Patent
active
056338317
ABSTRACT:
A timing generating circuit generates a signal SRE defining a period in which a self-refreshing operation is carried out based on a signal extRAS and a signal extCAS. An internal voltage down-converting circuit controls the level of an internal power supply voltage intVcc to be generated in the period defined by the signal SRE lower in the self-refreshing operation than in a normal operation. As a result, a semiconductor memory device is obtained which reduces current consumption in the self-refreshing operation by simple control in an internal circuit.
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Arimoto Kazutami
Tsukude Masaki
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Tan T.
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