Semiconductor memory device having self refresh mode and...

Details Semiconductor memory device having self refresh mode and... Semiconductor memory device having self refresh mode and...

2007-03-13

2007-03-13

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S211000

Reexamination Certificate

active

11328237

ABSTRACT:
A semiconductor memory device supporting a self refresh operation is disclosed and comprises an address buffer unit and an operation control unit. The address buffer unit may be enabled during the self refresh operation by a first external control signal to generate an internal address signal. The operation control unit controls the start of the self refresh operation in response to the internal address signal.

REFERENCES:
patent: 5680359 (1997-10-01), Jeong
patent: 6483764 (2002-11-01), Chen Hsu et al.
patent: 6552945 (2003-04-01), Cooper et al.
patent: 6717457 (2004-04-01), Nanba et al.
patent: 2005/0105367 (2005-05-01), Kim et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device having self refresh mode and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having self refresh mode and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having self refresh mode and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3734700